Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/BGM210LA22JNF/GPIO_NS/USART0_ROUTEEN#0x0
No Description
CS pin enable control bit
RTS pin enable control bit
RX pin enable control bit
CLK pin enable control bit
TX pin enable control bit
https://github.com/cmsis-svd/cmsis-svd-data